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Position Details: Lead Hardware Engineer

Location: Boston, Massachusetts
Openings: 1

Description:

Lead Hardware Engineer

 Federated Wireless develops technologies that maximize the utilization of spectrum resources, further advancing the wireless revolution. This individual is an expert on FPGA/ASIC development and verification for complex signal processing and communications designs. The candidate has extensive experience in ASIC/FPGA SoC development (e.g., Zynq, Arria) and high-throughput FPGA/ASIC designs that are integrated with RF transceivers. This individual will lead the FPGA implementation for a spectrum sensing solution, working with system and RF engineers and other hardware engineers to implement and verify the solution in an integrated software defined radio platform. Once the platform is field tested and verified, the candidate will help specify and verify a sensing board design and work on cost-reduction and performance-improving strategies leading to products suitable for volume production.

 Responsibilities

  • Stay current with latest FPGA and SoC technologies, development environments, tools, process and best practices
  • Lead product studies and performs requirements analysis to meet requirement
  • Lead RTL design, test bench development, verification, and debug, including chip-level verification and automated regressions
  • Design, simulation, and qualification of algorithms for signal detection & classification
  • Create and/or specifies labs for system test & performance evaluation, conduct lab and field testing to optimize design and verify performance of firmware
  • Write design specifications
  • Interface with other design teams to resolve design, implementation, and deployment issues
  • Assist architecture reviews of all major hardware development projects
  • Assess technologies & products to determine and/or recommend venders & partners
  • Measure compliance against standards
  • Report status against project plan
  • Prepare and present technical briefings to customers and senior management
  • Assist in building, managing and expanding the company’s intellectual property estate.

 Requirements

- 10-15 years comprehensive experience in ASIC/FPGA SoC development

- Extensive experience with creation of implementation architectures for high-throughput digital signal processing (DSP) designs

- Proficient at RTL design, test bench development, verification, and debug, including chip-level verification and automated regressions

- Fluent in Verilog, VHDL, TCL, C, Perl (or Python), and LINUX.

- Good familiarity with wide spectrum of DSP concepts (FFT, LDPC, IIR, filters, etc) and their efficient implementations.

- Strong experience with system-on-chip (SoC) FPGA development tools, Altera (Qsys/Quartus) or Xilinx (Vivado). Both a plus

- Comprehensive experience with FPGA implementation, timing closure, power, and development board-based debug

- Experience with ARM-based SoC FPGAs, e.g., Altera ArriaV SoC or Xilinx Zynq

- Experience developing ARM-based FPGA driver and debug code in C.

- Experience with selection and use of FPGA vendor IP (PLL, DDR3, DMA, etc.), and common FPGA interfaces (FMC, HSMC, SPI, I2C, JESD204B, etc.).

- Strong oral/written communication skills required.

Education and Other Qualifications

  • Minimum BSEE. MSEE preferred 

Location: Boston, MA

 Travel: Travel will be required in this position, domestically or internationally as deemed necessary to the growth and expansion of the Company.

 

 

 

 

 

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